Addressing Modes Part 1 - Immediate, Register, and Direct
Learning Goals
- Understand immediate addressing mode: loading constant data directly into registers (MOV A, #35H syntax), recognizing # symbol as immediate mode identifier, and analyzing when immediate addressing is appropriate for fixed values
- Explain register addressing mode: direct operations on R0-R7 registers across different register banks, utilizing PSW to select active register bank, and identifying register-to-register operations for efficient execution
- Master direct addressing mode: accessing data memory locations using explicit memory addresses (MOV A, 0FH syntax), distinguishing between register addressing and direct addressing through operand specification, and applying direct addressing for accessing SFRs and RAM variables
- Analyze addressing mode selection criteria: determining when immediate vs register vs direct addressing is most efficient for program logic, recognizing instruction encoding implications, and optimizing code for memory and execution speed
- Trace addressing mode behavior in practical instruction sequences: MOV A, #35H followed by ANL A, 0FH demonstrating mode transitions, understanding how different addressing modes affect program flow, and applying modes to common programming patterns
- Compare 8085 and 8051 immediate addressing: understanding basic similarities in immediate data specification, recognizing architectural differences in how modes are encoded, and adapting 8085 knowledge to 8051's enhanced addressing capability
- Understand instruction operand field encoding: how addressing mode is determined from instruction byte in machine language, recognizing mode-specific bit patterns in opcode, and relating assembly syntax to machine code representation
- Apply addressing modes to data transfer operations: using MOV instructions effectively with different addressing modes, recognizing LDAX and STAX syntax variations, and selecting appropriate modes for program requirements
Addressing modes define how the CPU determines the operand's location for an instruction . In the 8051 microcontroller, these modes are critical for optimizing code size and execution speed. This section focuses on the three most fundamental modes: Immediate, Register, and Direct.
The relationship between the instruction and the data flow can be visualized as follows:
These modes are the building blocks for data transfer operations using the MOV instruction . While they may seem similar in assembly syntax, their underlying machine code encoding and hardware execution paths differ significantly.
Footnotes
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8051 Addressing Modes Overview - General introduction to 8051 addressing. ↩
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8051 Instruction Set - Detailed breakdown of data transfer instructions. ↩
Addressing Modes of 8051 Microcontroller
1. Immediate Addressing Mode
In this mode, the operand is a constant value provided directly within the instruction .
- Syntax: Uses the
#symbol to denote immediate data. - Example:
MOV A, #35Hloads the hex value into the Accumulator. - Use Case: Initializing registers with fixed constants, setting bit masks, or loading loop counters.
2. Register Addressing Mode
This mode accesses the eight general-purpose registers ( through ) of the currently active register bank .
- Syntax: Uses register names directly (e.g.,
MOV A, R5). - Efficiency: These instructions are typically 1-byte long and execute in a single machine cycle, making them the fastest way to manipulate data.
3. Direct Addressing Mode
Direct addressing specifies the exact 8-bit internal RAM address or Special Function Register (SFR) address in the instruction .
- Syntax: Uses the numeric address (e.g.,
MOV A, 0FH). - Range: Can access internal RAM (00H-7FH) and SFRs (80H-FFH).
- Distinction: Unlike register mode, this can access any memory location directly without needing a pointer.
Footnotes
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Immediate Addressing Details - Explanation of immediate constants and syntax. ↩
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Register Bank Selection - Technical guide on PSW and register banks. ↩
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Direct Addressing and SFRs - Usage of direct addresses for internal RAM and SFRs. ↩
Configuring Register Banks via PSW
- 1Step 1
The PSW is an 8-bit SFR (address D0H) containing status flags and register bank selection bits.
- 2Step 2
Bits PSW.4 (RS1) and PSW.3 (RS0) determine which of the four register banks (0-3) is currently active .
Footnotes
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Register Bank Selection - Technical guide on PSW and register banks. ↩
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- 3Step 3
To select Bank 2, set RS1=1 and RS0=0. In assembly:
SETB PSW.4followed byCLR PSW.3. - 4Step 4
After selection, an instruction like
MOV R0, Awill now target the R0 located at RAM address 10H (the start of Bank 2).
The Power of the '#' Symbol
Always remember that the '#' symbol is the identifier for immediate addressing. MOV A, 25H (Direct) loads the value stored at address 25H, while MOV A, #25H (Immediate) loads the actual number 25H into the accumulator .
Footnotes
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Immediate Addressing Details - Explanation of immediate constants and syntax. ↩
1; Immediate 2MOV A, #44H 3 4; Register 5MOV A, R1 6 7; Direct 8MOV A, 70H
Instruction Performance Comparison
Typical Bytes and Cycles for MOV A,
Instruction Encoding and Machine Code
The CPU distinguishes between these modes by looking at the Opcode bits . For example, the MOV A, Rn instruction has an opcode where the lower 3 bits represent the register number (000 for R0 to 111 for R7).
In contrast, MOV A, direct uses a specific opcode (E5H) followed by a second byte containing the 8-bit memory address. This is why register addressing is more memory-efficient (1 byte) than direct or immediate addressing (2 bytes).
Footnotes
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Instruction Encoding - Machine code and opcode bit patterns for addressing. ↩
Deep Dive: Practical Selection Criteria
Assembler Error: Missing #
Forgetting the '#' in an immediate instruction is a common bug. Writing MOV A, 05H instead of MOV A, #05H will cause the CPU to read the value from RAM address 05H instead of loading the number 5, often leading to unpredictable program behavior.
Knowledge Check
Which symbol is used to identify Immediate Addressing in 8051 assembly?