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Microprocessor

Addressing Modes Part 2 - Indirect, Relative, and Indexed

1 hour

Learning Goals

  • Understand indirect addressing mode: using register pointers (R0, R1) to access memory locations dynamically, LDAX and STAX instruction behavior with indirect operands, and pointer-based data structures for flexible memory access patterns
  • Master relative addressing mode: recognizing 8-bit signed relative addresses in branch instructions (JNZ, JZ, JC, JNC), calculating jump target range in 2's complement form (-128 to 127 bytes from instruction start), and understanding branch instruction encoding with relative address calculation
  • Analyze relative addressing range: computing forward and backward jump distances from current instruction location, understanding relative address as first byte of next instruction reference point, and validating jump targets within -128 to 127 byte range for correctness
  • Explain indexed addressing mode: accessing program memory tables using PC-relative indexing (MOVC A, @A+PC and MOVC A, @A+DPTR syntax), utilizing accumulator or DPTR as index registers, and implementing lookup tables for non-linear transformations and character conversion
  • Apply indexed addressing to advanced programming: implementing lookup tables for non-linear transformations, using DPTR-indexed access for large tables, managing table boundaries and address calculations

In microprocessor architecture, addressing modes define how the CPU identifies the location of an operand. While direct and immediate modes are straightforward, Indirect, Relative, and Indexed addressing modes provide the flexibility required for dynamic memory access, branching, and complex data structures like lookup tables .

In the 8051 and 8085 architectures, these modes are critical for:

  • Dynamic Memory Access: Navigating arrays or buffers using pointers.
  • Efficient Branching: Implementing loops and conditional logic within a localized memory range.
  • Data Transformation: Converting inputs (like ASCII to Seven-Segment) using pre-defined tables in program memory.

Footnotes

  1. Addressing modes in 8085 microprocessor - Comprehensive overview of data access methods. ↩

Addressing Modes of 8051 Microcontroller

1. Indirect Addressing Mode

Indirect addressing uses a register as a pointer to a memory location. Instead of the instruction containing the actual data or the direct address, it contains the name of the register that holds the address.

8051 Implementation

In the 8051 microcontroller, internal RAM is accessed indirectly using registers R0 and R1 with the @ prefix .

  • Example: MOV A, @R0
    • This moves the data from the memory location pointed to by R0 into the Accumulator.

8085 Implementation (LDAX and STAX)

In 8085 microprocessors, the LDAX and STAX instructions are primary examples of indirect addressing :

  • LDAX B: Load Accumulator with data from the memory address stored in the BC register pair.
  • STAX D: Store the contents of the Accumulator into the memory address stored in the DE register pair.

Effective Address=[Register Pair]Effective\ Address = [Register\ Pair]

Footnotes

  1. Addressing modes of 8051 - Technical breakdown of 8051 specific modes. ↩

  2. Addressing modes in 8085 microprocessor - Comprehensive overview of data access methods. ↩

Pointer Flexibility

Indirect addressing is essential for 'looping' through an array. By incrementing the pointer register (e.g., INC R0), you can access sequential memory locations without changing the instruction itself .

Footnotes

  1. Addressing modes of 8051 - Technical breakdown of 8051 specific modes. ↩

2. Relative Addressing Mode

Relative addressing is used exclusively for branching instructions (jumps). The instruction does not contain a target 16-bit address; instead, it contains an 8-bit signed offset .

Key Characteristics:

  • Range: The offset is an 8-bit 2's complement number, allowing a jump range of -128 to +127 bytes from the address of the next instruction .
  • Instructions: Common instructions include JZ (Jump if Zero), JNZ (Jump if Not Zero), JC (Jump if Carry), and JNC .
  • Encoding: These are typically 2-byte instructions: [Opcode] [Relative Offset].

Footnotes

  1. 8051 Relative Addressing Mode - Explanation of the 8-bit signed value. ↩

  2. 8051 Relative Jump Instructions - Details on branch ranges and calculations. ↩ ↩2

Calculating a Relative Jump Target

  1. 1
    Step 1

    Note the memory address where the branch instruction (e.g., SJMP) starts.

  2. 2
    Step 2

    Add the size of the current instruction (usually 2 bytes) to find the 'base' Program Counter (PCPC) value.

  3. 3
    Step 3

    Add the 8-bit signed offset to the base PCPC. If the offset is negative (represented in 2's complement), the jump is backward; if positive, the jump is forward.

  4. 4
    Step 4

    Ensure the target address falls within the −128-128 to +127+127 byte window relative to the next instruction. If it exceeds this, an 'Absolute' or 'Long' jump must be used instead .

    Footnotes

    1. 8051 Relative Addressing Mode - Explanation of the 8-bit signed value. ↩

3. Indexed Addressing Mode

Indexed addressing is used to access data from Program Memory (ROM), typically for lookup tables. It calculates the effective address by adding a base register to an offset (the Accumulator) .

Core Instructions:

  1. MOVC A, @A+DPTR: Uses the 16-bit Data Pointer (DPTRDPTR) as the base.
  2. MOVC A, @A+PC: Uses the Program Counter (PCPC) as the base.

Implementation of Lookup Tables

Lookup tables allow for non-linear transformations, such as converting a hex digit to its Seven-Segment display code .

Footnotes

  1. 8051 instruction set summary - Summary of indexed and relative modes. ↩

  2. Lookup Tables in 8051 Programming Guide - Practical uses for indexed addressing. ↩

Addressing Range Comparison

Maximum reach of different addressing modes in 8051

The PC-Relative Trap

When using MOVC A, @A+PC, remember that the PCPC value used is the address of the instruction following the MOVC. If your table starts immediately after the instruction, the Accumulator must often be adjusted (e.g., INC A) to account for the instruction's own length .

Footnotes

  1. 8051 instruction set summary - Summary of indexed and relative modes. ↩

Advanced Concepts & FAQs

Knowledge Check

Question 1 of 4
Q1Single choice

What is the maximum forward jump distance for a relative addressing instruction like JZ?

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