Pipeline Hazards: Stalling Due to Unavailability of the Instruction
In a pipelined processor, the CPU may stall when an instruction cannot proceed to the next pipeline stage. A key question is how to classify the stall when the instruction is unavailable.
In standard pipeline hazard terminology, stalling because the processor cannot fetch/use an instruction due to resource/structural limitations is classified as a Structural Hazard.
By contrast:
- Control Hazard comes from branch/jump outcome uncertainty.
- Data Hazard comes from operand timing.
- “Input hazard” is not a commonly used primary classification in the canonical 3-hazard scheme for instruction pipelines.
A stall specifically attributed to unavailability of the instruction is therefore best matched to structural hazard rather than control hazard.
To connect the multiple-choice options:
- (i) Control hazard → wrong: control hazards are about branch outcome uncertainty, not missing instruction availability.
- (ii) Structural hazard → correct: instruction unavailability typically reflects hardware/resource unavailability for fetching/issuing.
- (iii) Input hazard → wrong/ambiguous: “input hazard” is not the standard named category for this scenario in typical pipeline hazard sets.
- (iv) None of the above → wrong because (ii) is the standard match.
Mermaid summary:
Selecting the Correct Option (Reasoning Steps)
- 1Step 1
The prompt states the stall happens because the instruction is unavailable.
- 2Step 2
Instruction unavailability in a pipeline is treated as a resource limitation (e.g., fetch/issue path not available), which aligns with Structural Hazard.
- 3Step 3
A Control Hazard is caused by uncertain branch/jump outcomes, not by missing instruction availability.
- 4Step 4
Therefore the correct option is (ii) Structural hazard.
Exam shortcut
If the question mentions stall due to hardware not being able to supply/handle something (like missing instruction fetch/issue availability), it usually points to Structural Hazard.
About “Input hazard”
In many textbooks/MCQs, “input hazard” is not a standard pipeline hazard label in the common set (data/control/structural). If “input hazard” appears, it can be instructor-specific—so you should rely on the mechanism described: resource unavailability ⇒ structural.
Where the Stall Shows Up in a Typical Pipeline
Instruction availability check
Fetch/DecodeIf the instruction cannot be fetched/used due to resource limitations, the pipeline stalls."
Work cannot proceed
ExecuteDownstream stages wait until the needed instruction becomes available."
Resume after hazard clears
WritebackOnce the instruction path is available, the pipeline resumes normally."
Hazard Type vs Typical Cause (Quick Matching)
Use this as a mental map for MCQ classification.
Concept Check (Why not the other options?)
Knowledge Check
The stalling of the processor due to the unavailability of the instruction is called as: