Half-Adder: Truth Table and Logic Circuit (XOR/AND)

A keyword half-adder adds two single-bit inputs $A$ and $B$ and produces two outputs: keyword Sum $S$ and keyword Carry $C$. In the simplest gate-level design, Sum is implemented with keyword XOR and Carry with keyword AND:
$S = A \oplus B,\qquad C = A \cdot B$

The half-adder is a combinational circuit (no memory): for every input pair $(A,B)$, the outputs are determined immediately by the Boolean expressions above.

Footnotes

1. Half Adder Circuit—Theory, Design, and Implementation - Provides the half-adder truth table and Boolean expressions $S=A\\oplus B$, $C=A\\cdot B$ and notes XOR/AND implementation. ↩ ↩²

Truth table for the half-adder

Enumerate all $2^2=4$ input combinations for $(A,B)$, then compute outputs using $S=A\oplus B$ and $C=A\cdot B$.

This corresponds to the binary addition interpretation: when $A+B=2$ (i.e., $1+1$), the sum bit is $0$ and the carry bit is $1$.

Footnotes

1. Half Adder Circuit—Theory, Design, and Implementation - Provides the half-adder truth table and Boolean expressions $S=A\\oplus B$, $C=A\\cdot B$ and notes XOR/AND implementation. ↩

2. Adder (electronics) - Wikipedia - Defines the half adder as adding two single binary digits $A$ and $B$ with outputs sum and carry, and discusses overflow into the next digit. ↩

What the gates are doing (logic interpretation)

• keyword XOR outputs $1$ exactly when $A$ and $B$ differ, matching the half-adder sum bit.
• keyword AND outputs $1$ only when $A=1$ and $B=1$, matching the half-adder carry bit.
• Therefore, in the specific truth-table row $(A,B)=(1,1)$, XOR gives $0$ while AND gives $1$, producing $(S,C)=(0,1)$.

Footnotes

1. XOR gate - Wikipedia - Defines XOR as outputting 1 when inputs are different and includes XOR truth-table behavior. ↩ ↩²

2. Half Adder Circuit—Theory, Design, and Implementation - Provides the half-adder truth table and Boolean expressions $S=A\\oplus B$, $C=A\\cdot B$ and notes XOR/AND implementation. ↩