Addressing Mode in Computer Architecture: Meaning and Five+ Types with Examples

Addressing Mode in Computer Architecture: Meaning and Five+ Types with Examples

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Nov 4, 2026

In instruction execution, an addressing mode tells the CPU how to interpret the “operand” field of an instruction—either as a value (like a constant) or as information needed to compute the effective address of the operand. This distinction is central to how the CPU determines which data location to use for loads, stores, and arithmetic operations.

At a high level, addressing modes can be described in terms of how they produce the effective address (often abbreviated EA). Many textbooks summarize the main idea as: the instruction format and addressing mode specify a method for determining the EA or directly supplying the operand value.

A common taxonomy includes (at least) immediate, direct, register, indirect, indexed, and base+displacement/relative (PC-relative) addressing. Different ISAs present these in slightly different instruction syntaxes, but the underlying purpose is the same: map instruction bits to either a value or a memory location.

Below is a structured explanation with examples and what each mode is doing conceptually (including typical EA formulations). Mermaid overview of how modes relate to “value vs address”:

Key terms (to anchor your mental model):

  • addressing mode
  • effective address
  • operand
  • register
  • program counter (PC)

Understanding Addressing Modes (Conceptual Overview)

Why addressing modes matter

Addressing modes affect:

  1. What bytes the CPU reads/writes (value vs memory location).
  2. Whether you can write compact code (e.g., loop indexing with indexed/base addressing).
  3. Performance and flexibility (e.g., fewer extra instructions when the mode can express common patterns directly).

A good way to learn them is to always answer two questions for any mode:

  • Does the operand field represent a value or an address (or part of one)?
  • If an address is involved, how is the EA computed?

Compute the operand using an addressing mode (generic procedure)

  1. 1
    Step 1

    Identify the addressing mode from the instruction encoding (or from the assembly syntax).

  2. 2
    Step 2

    If the mode is immediate, the operand value is taken directly from the instruction. Otherwise, determine how EA is formed.

  3. 3
    Step 3

    Fetch any base/index/indirect-register values required by the mode.

  4. 4
    Step 4

    Use the mode’s rule to combine displacement/immediate and registers (e.g., base + displacement, base + index).

  5. 5
    Step 5

    Use EA to read/write memory for the operation.

Example setup (used consistently below)

To make examples comparable, assume:

  • Register R1=1000R1 = 1000
  • Register R2=200R2 = 200
  • Memory at address 12001200 holds value 77
  • Program counter PC=5000PC = 5000
  • Immediate/displacement fields are denoted as kk, disp\text{disp}, etc.

Note: Exact EA formulas vary by ISA, but the conceptual meaning stays consistent.

Five (actually six) addressing modes with examples

1) Immediate addressing

In immediate addressing, the operand value is taken directly from the instruction—no memory address computation is needed.

Concept:

  • Operand = kk

Example:
Instruction: ADD R1, #5
Meaning: R1←R1+5R1 \leftarrow R1 + 5
If R1=1000R1=1000, then result is 10051005.


2) Register addressing

In register addressing, the instruction names a register that holds the operand value. Again, no memory EA is computed.

Example:
Instruction: ADD R3, R1
Meaning: R3←R1R3 \leftarrow R1 (using R1R1’s contents directly)
If R1=1000R1=1000, then R3=1000R3=1000 after the move/add.


3) Direct (absolute) addressing

In direct addressing, the operand’s memory address is given directly (often as an absolute address or a direct address field).

Concept:

  • EA = AA (some absolute address)

Example:
Instruction: LOAD R1, [1200]
Meaning: R1←Mem[1200]R1 \leftarrow \text{Mem}[1200]
If Mem[1200]=7\text{Mem}[1200]=7, then R1=7R1=7 after loading.


4) Indirect addressing

In indirect addressing, the instruction refers to a register whose contents are treated as the EA.

Concept:

  • EA = contents of a register (say R1R1)

Example:
Instruction: LOAD R2, [R1]
Meaning: EA = R1=1000R1 = 1000, so R2←Mem[1000]R2 \leftarrow \text{Mem}[1000]
If Mem[1000]=X\text{Mem}[1000]=X, then R2=XR2=X.

This is powerful because the instruction doesn’t need to carry the final memory address; the address can be computed/updated in registers earlier.


5) Indexed addressing (base + index)

In indexed addressing, the EA is computed using an index register plus a displacement/offset. Often this supports array traversal.

Concept:

  • EA = R2+dispR2 + \text{disp}

Example:
Instruction: LOAD R1, [R2 + 100]
Meaning: EA =200+100=300= 200 + 100 = 300
Then R1←Mem[300]R1 \leftarrow \text{Mem}[300].

If the array element size is ss bytes, you often store index * s in the index register (or use scaled indexing in some ISAs).


6) Base + displacement (a common form of memory addressing)

Many ISAs use base+displacement addressing. It’s very common for accessing fields, stack frames, and arrays.

Concept:

  • EA = R1+dispR1 + \text{disp}

Example:
Instruction: STORE R2, [R1 + 200]
Meaning: EA =1000+200=1200= 1000 + 200 = 1200
Then Mem[1200]←R2\text{Mem}[1200] \leftarrow R2.
If R2=200R2=200, then Mem[1200]\text{Mem}[1200] becomes 200200.


7) PC-relative (relative) addressing (bonus)

In PC-relative addressing, the effective address is formed by adding a displacement to the current (or next) PC. This is especially common for branches.

Concept:

  • EA = PC+dispPC + \text{disp}

Example:
Assume PC=5000PC=5000 and displacement disp=−20\text{disp}= -20 (relative jump backwards).
Then EA =5000−20=4980= 5000-20=4980.
A branch to a nearby label can be expressed compactly.

Addressing Modes: Value vs Memory + Typical EA Idea

Conceptual categories (not a hardware benchmark). Higher “memory-based” means the operand usually comes from RAM via EA.

Pro Tip: Write EA on the margin

When solving problems, literally write the EA formula (e.g., EA = R1 + disp). Then decide whether the instruction uses Mem[EA] or uses the operand value directly.

Pro Tip: Assembly syntax can hide the addressing mode

Different ISAs use brackets and prefixes differently (e.g., LOAD R, [addr] vs LOAD R, addr). Always translate syntax to the underlying EA/value rule.

Common edge cases and clarifications

Addressing Modes Quick Check

1 / 5
Question · Term

Immediate addressing: what does the operand field represent?

Click to reveal
Answer · Definition

A constant value encoded in the instruction.

Knowledge Check

Question 1 of 4
Q1Single choice

In immediate addressing, the operand is best described as: