Timer and Counter Interfacing
Learning Goals
- Understand timer circuit definition: recognizing timer as electronic device generating precise time intervals or counting external events, utilizing timer output for delay generation, frequency measurement, and interval-based event triggering in embedded systems
- Master timer registers and control: analyzing TMOD (Timer Mode) register selecting timer modes (mode 0: 13-bit timer, mode 1: 16-bit timer, mode 2: 8-bit auto-reload), recognizing TCON (Timer Control) controlling timer start/stop and interrupt flags, managing TH0/TL0 and TH1/TL1 register pairs
- Apply timer modes: implementing mode 0 (13-bit) for simple counting applications, utilizing mode 1 (16-bit) for longer time intervals (65536 maximum count), employing mode 2 (8-bit auto-reload) for periodic interrupt generation without reload overhead
- Understand counter mode: recognizing counter operation from external event pulses on T0/T1 pins, counting external transitions for event measurement, and differentiating counter from timer (external input vs internal clock source)
- Calculate timer intervals: determining timer overflow period for given mode and reload values, calculating interrupt frequency for periodic timer operations, predicting application timing requirements from timer configuration
- Analyze timer interrupt generation: recognizing timer overflow triggering interrupt request (TF0, TF1 flags), utilizing timer interrupts for interrupt-driven timing operations, managing interrupt handler execution time constraints
- Master timer-based delay generation: implementing fixed delays through timer calculation, creating variable delays with register manipulation, understanding timing limitations and minimum delay achievable
- Apply practical timer applications: implementing software PWM (Pulse Width Modulation) with timer-based interrupt control, generating timing signals for protocol implementation, measuring external pulse frequency and duration using counter mode
In microprocessor systems, a timer is an electronic circuit that generates precise time intervals or counts internal clock pulses to measure duration. Conversely, a counter is used to count external events by detecting transitions (pulses) on specific input pins . In the context of the 8051 architecture, these components are essential for generating delays, measuring frequencies, and managing real-time tasks without overloading the CPU .
The fundamental difference lies in the clock source:
- Timer Mode: The internal crystal oscillator frequency (divided by a prescaler, usually 12) serves as the clock source.
- Counter Mode: External pulses applied to the (P3.4) or (P3.5) pins trigger the increment .
Footnotes
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TMOD Register Technical Reference - Detailed breakdown of TMOD bits and 13-bit/16-bit modes. ↩
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8051 Timers and Counters - GeeksforGeeks - Comparison of timer vs. counter modes and applications. ↩
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Timers and Counters in 8051 - Comprehensive overview of TMOD and TCON SFRs. ↩
Timer and Counter in 8051 Microcontroller Explained
Timer Control Registers
The operation of timers is governed by two Primary Special Function Registers (SFRs): TMOD (Timer Mode) and TCON (Timer Control).
1. TMOD Register (Address: 89H)
This register is not bit-addressable. It is divided into two 4-bit sections to configure Timer 1 (high nibble) and Timer 0 (low nibble) 2.
| Bit | Name | Description |
|---|---|---|
| 7/3 | GATE | If 1, timer runs only when pin is high and is 1. If 0, alone controls the timer. |
| 6/2 | C/T | Clock/Timer selector. 0 = Timer (internal), 1 = Counter (external). |
| 5/1 | M1 | Mode selector bit 1. |
| 4/0 | M0 | Mode selector bit 0. |
2. TCON Register (Address: 88H)
This register is bit-addressable, allowing software to start/stop timers and monitor overflow flags individually .
- TF1 / TF0: Timer Overflow Flags. Set to 1 when the timer rolls over.
- TR1 / TR0: Timer Run Control bits. Set to 1 to start, 0 to stop.
Footnotes
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TMOD Register Technical Reference - Detailed breakdown of TMOD bits and 13-bit/16-bit modes. ↩
-
Timers and Counters in 8051 - Comprehensive overview of TMOD and TCON SFRs. ↩ ↩2
Machine Cycle Calculation
For an 8051 with an 11.0592 MHz crystal, the machine cycle frequency is . This means the timer increments every .
Footnotes
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8051 Timer Issues and Calculations - Formulas for machine cycles and crystal frequency relationships. ↩
Calculating Timer Delay for Mode 1 (16-bit)
- 1Step 1
Identify the target time interval (e.g., 10 ms).
- 2Step 2
Divide the target delay by the machine cycle period (). For 10 ms: counts .
Footnotes
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RefreshNotes: 8051 Timers - Step-by-step delay calculation examples and register addresses. ↩
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- 3Step 3
Since the timer counts up, subtract the required counts from the maximum possible value ( for 16-bit). .
- 4Step 4
Footnotes
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RefreshNotes: 8051 Timers - Step-by-step delay calculation examples and register addresses. ↩
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Maximum Count Capacity by Mode
Comparison of the maximum counts achievable before overflow
1; Generate delay using Timer 0, Mode 1 2MOV TMOD, #01H ; Timer 0, Mode 1 (16-bit) 3MOV TL0, #00H ; Load Lower Byte 4MOV TH0, #0DCH ; Load Higher Byte 5SETB TR0 ; Start Timer 6WAIT: JNB TF0, WAIT ; Poll until overflow 7CLR TR0 ; Stop Timer 8CLR TF0 ; Clear Flag for next use
Advanced Interfacing Applications
Manual Flag Clearing
In Polling Mode, you MUST manually clear the flag in software (). In Interrupt Mode, the hardware automatically clears the flag when the processor vectors to the ISR 2.
Footnotes
-
TMOD Register Technical Reference - Detailed breakdown of TMOD bits and 13-bit/16-bit modes. ↩
-
8051 Timer Programming Guide - Explanation of polling vs. interrupt-driven timing. ↩
Knowledge Check
Which register is used to select the timer mode (0, 1, or 2)?