PYQ Analysis — Module 4: Memory and I/O Interfacing

Topic Distribution Analysis

Module 4 carries 10–15 marks in the exam. Focus on:

High-Weightage Questions (Expected Tomorrow)

Q1: Explain how external memory is expanded for 8051. Design a system with 16 kB ROM + 8 kB RAM. Show address ranges. (6 marks)

Step 1: External Bus

• Port 0 provides multiplexed AD0-AD7 (address/data)
• Port 2 provides A8-A15 (high address byte)
• ALE demultiplexes AD0-AD7 via external latch (74373)

Step 2: Address Line Requirements

• 16 kB ROM needs 14 address lines (2^14 = 16384 = 16 kB) → A0-A13
• 8 kB RAM needs 13 address lines (2^13 = 8192 = 8 kB) → A0-A12
• Remaining lines (A14, A15) used for chip select via decoder

Step 3: Address Decoding

Step 4: Address Range Calculation

ROM (CS = A14=1, A15=0):

ROM range: 4000H – 7FFFH (16 kB)

RAM (CS = A14=0, A15=1):

RAM range: 8000H – 9FFFH (8 kB)

Control Signals:

• ROM: PSEN (Program Store Enable) activates during instruction fetch
• RAM: RD (read) and WR (write) from 8051

Q2: Explain the role of ALE in bus demultiplexing. (4 marks)

ALE (Address Latch Enable):

• ALE goes HIGH once every machine cycle
• When ALE = HIGH: Port 0 outputs the lower address byte (AD0-AD7 as address)
• When ALE ↓ (falling edge): External latch (e.g., 74373) captures and holds the address
• After ALE ↓: Port 0 switches to data mode (AD0-AD7 as data bus)

Timing Sequence:

1. ALE ↑ → Address valid on Port 0
2. Latch stores address on ALE falling edge
3. Port 0 now free for data read/write
4. PSEN ↓ (for ROM) or RD/WR (for RAM) activates data transfer

Why needed: 8051 has only 40 pins — multiplexing address/data saves pins but requires external demultiplexing.

Q3: Explain the 8051 timer modes and how to generate a 1 ms delay at 12 MHz. (5 marks)

TMOD Register (Timer Mode, Address 89H):

Timer Modes:

1 ms delay calculation (12 MHz, Mode 1):

• 1 machine cycle = 12/12 MHz = 1 µs
• Timer counts up every machine cycle (1 µs step)
• For 1 ms delay: count = 1000 µs / 1 µs = 1000 counts
• 16-bit reload value = 65536 − 1000 = 64536 = FC18H

1MOV TMOD, #01H   ; Timer 0, Mode 1 (16-bit)
2MOV TH0, #0FCH   ; Load high byte
3MOV TL0, #18H    ; Load low byte
4SETB TR0         ; Start Timer 0
5WAIT:
6JNB TF0, WAIT    ; Wait for overflow
7CLR TF0          ; Clear overflow flag
8CLR TR0          ; Stop timer
9RET

Q4: Explain the difference between timer mode and counter mode. (3 marks)

Q5: Explain ADC interfacing with 8051. (4 marks)

ADC0804 Interfacing (8-bit, Successive Approximation):

Required connections:

• Vin(+): Analog input (0-5V)
• Vin(−): Ground (or offset)
• Vref/2: Reference voltage (2.56V for 0-5V range with step ≈ 19.53 mV)
• CLK IN/R: External RC oscillator for conversion clock

Control sequence:

1. CS = 0 (chip select)
2. WR pulse → Start Conversion (SOC)
3. Wait for INTR to go LOW (End of Conversion − EOC)
4. CS = 0, RD pulse → Read data from DB0-DB7

1START:
2CLR P1.0          ; CS = 0
3SETB P1.1         ; WR = 1
4NOP
5CLR P1.1          ; WR = 0 (start conversion)
6NOP
7SETB P1.1         ; WR = 1
8WAIT:
9JB P1.3, WAIT     ; Wait INTR = 0 (conversion done)
10CLR P1.2          ; RD = 0 (enable output)
11MOV P0, #0FFH     ; Configure P0 as input
12MOV A, P0         ; Read digital value
13SETB P1.2         ; RD = 1
14SETB P1.0         ; CS = 1

Q6: Explain DAC interfacing with 8051 to generate a sawtooth waveform. (3 marks)

DAC0808 interfacing:

• 8-bit digital input → analog current output
• Op-amp (741) converts current to voltage
• I_out = (Digital_Value / 255) × I_ref

Sawtooth generation:

1MOV A, #00H
2SAWTOOTH:
3MOV P1, A          ; Output to DAC
4INC A              ; Increment (0 → 255 → wrap to 0)
5CALL DELAY         ; Small delay for step time
6SJMP SAWTOOTH

Quick Revision Notes

• ALE demultiplexes address/data — latch captures lower address byte
• PSEN controls ROM, RD/WR control RAM (different signals for different memory types)
• EA = 0: External ROM only; EA = 1: Internal + External
• MOVX instructions for external data memory access
• TMOD register configures timer/counter mode; TCON controls start/stop and flags
• Timer Mode 1 (16-bit) most common for delays
• Transfer function: Digital_Value = (Vin / Vref) × 255 for 8-bit ADC
• External pull-ups: Port 0 needs 10 kΩ pull-ups for external memory access