Wet vs Dry Etching in MEMS: Comparison and the Significance of Anisotropic Etching
Wet etching and dry etching are the two dominant material-removal approaches used in keyword wet etching and keyword dry etching steps during MEMS fabrication. Wet etching typically relies on liquid chemistries (e.g., alkaline silicon etchants, HF-based oxide etchants) and is often faster for certain materials, while dry etching uses plasma tools (e.g., keyword reactive ion etching, RIE; keyword deep reactive ion etching, DRIE) that better control sidewall shape, feature profile, and pattern transfer fidelity.2
A central design requirement in MEMS is controlling etch directionality. keyword anisotropic etching causes the etch rate to vary with crystallographic plane (most famously in crystalline silicon), enabling vertical or otherwise directionally controlled sidewalls. This anisotropy is significant because it allows high aspect-ratio, well-defined microstructures (e.g., membranes, cavities, and patterned trenches) without excessive undercut—something that is difficult to achieve with purely keyword isotropic etching.2
Mermaid overview of how the two etch classes differ conceptually:
Footnotes
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"Wet etching" (Wikipedia) - https://en.wikipedia.org/wiki/Wet_etching - Overview of wet etching concepts and general behavior. ↩
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"Reactive ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Reactive_ion_etching - Describes plasma-based RIE and directionality mechanisms. ↩
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"Anisotropic etching" (Wikipedia) - https://en.wikipedia.org/wiki/Anisotropic_etching - Explains anisotropic etching and crystal/orientation dependence. ↩
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"Deep reactive-ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Deep_reactive-ion_etching - Describes DRIE and high-aspect-ratio etching approaches (including Bosch mode). ↩
Anisotropic Etching (KOH) of Silicon and Crystal Planes (Intro)
Core comparison: wet vs dry etching (MEMS-relevant axes)
The table below contrasts wet and dry etching along key engineering dimensions that influence MEMS yield, geometry, and integration.
| Dimension | Wet etching | Dry etching |
|---|---|---|
| Driving mechanism | Chemical reaction in liquid phase; transport via diffusion/convection | Plasma generation of ions/radicals; reaction + (optionally) ion-driven physical effects |
| Typical profile | Often keyword isotropic → lateral undercut | Often directional → straighter sidewalls; can be engineered anisotropic |
| Mask/feature fidelity | Under-mask etching can degrade resolution | Better control over lateral etch and pattern transfer |
| Feature aspect ratio | Limited by isotropy and transport | Supports high aspect ratios (notably with DRIE) |
| Selectivity & chemistry flexibility | Can be very selective for certain material pairs | Selectivity depends on plasma chemistry and process tuning |
| Integration & packaging concerns | Wet residues, stiction risk, rinse/dry challenges | Tool-based process; less liquid-related stiction but adds plasma damage considerations |
| Surface quality | Can be smoother but may have roughness related to chemistry | Sidewall roughness and damage possible (depends on recipe and mode) |
Important: In practice, “wet vs dry” is not a complete determinant of isotropy vs anisotropy. Dry processes can be tuned to become more anisotropic (e.g., ion-assisted etching), while some wet chemistries can produce anisotropic etch rates in single-crystal materials.2
Footnotes
-
"Wet etching" (Wikipedia) - https://en.wikipedia.org/wiki/Wet_etching - Overview of wet etching concepts and general behavior. ↩
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"Anisotropic etching" (Wikipedia) - https://en.wikipedia.org/wiki/Anisotropic_etching - Explains anisotropic etching and crystal/orientation dependence. ↩
Design rule of thumb for MEMS shapes
If you need vertical sidewalls with minimal lateral undercut (e.g., narrow trenches or deep cavities), dry etching or single-crystal anisotropic wet etching is usually preferred over isotropic wet etching.
Stiction and undercut are common wet-etch failure modes
Wet etching can cause lateral undercut that changes dimensions and can increase release-and-drying stiction risk for released MEMS structures.
Choosing Wet vs Dry Etching for a MEMS Geometry
- 1Step 1
Determine whether you require near-vertical sidewalls, a given etch depth, and minimal lateral undercut.
- 2Step 2
For crystalline silicon, anisotropic wet etchants can exploit crystal-plane-dependent etch rates; for other materials, anisotropy may be harder to obtain with wet chemistry alone.
Footnotes
-
"Anisotropic etching" (Wikipedia) - https://en.wikipedia.org/wiki/Anisotropic_etching - Explains anisotropic etching and crystal/orientation dependence. ↩
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- 3Step 3
Choose either (a) wet anisotropic crystallographic etching or (b) dry plasma-directional etching such as RIE/DRIE to improve pattern transfer and aspect ratio.2
Footnotes
-
"Reactive ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Reactive_ion_etching - Describes plasma-based RIE and directionality mechanisms. ↩
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"Deep reactive-ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Deep_reactive-ion_etching - Describes DRIE and high-aspect-ratio etching approaches (including Bosch mode). ↩
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- 4Step 4
Check relative etch rates of material vs mask to avoid mask erosion that broadens features.
Footnotes
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"Wet etching" (Wikipedia) - https://en.wikipedia.org/wiki/Wet_etching - Overview of wet etching concepts and general behavior. ↩
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- 5Step 5
Dry etching can introduce plasma damage; wet etching can introduce residues and stiction during drying—plan mitigation (cleaning, drying methods, and surface treatments) accordingly.
Footnotes
-
"Reactive ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Reactive_ion_etching - Describes plasma-based RIE and directionality mechanisms. ↩
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- 6Step 6
Run calibration wafers to map etch rate vs time and critical dimensions vs process parameters; MEMS tolerances are sensitive to small etch-rate variations.
Significance of Anisotropic Etching in MEMS Fabrication
1) Crystal-plane-dependent etch control in silicon
In anisotropic silicon etching (a hallmark example uses alkaline solutions), the etch rate depends strongly on crystal orientation, often with a slow-etching keyword etch-stop plane and faster-etching planes. This directional selectivity enables fabrication of well-defined cavities and membranes with predictable geometry—because the etch naturally “halts” against low-rate crystal planes.2
Conceptual diagram of anisotropic etching proceeding toward a slower plane:
2) Dimension control: reduced undercut and better CD control
MEMS devices (cantilevers, gears, diaphragms, microfluidic features) rely on critical dimensions (CDs). Isotropic etching can enlarge features laterally, causing undercut that shifts etch depth-to-width relationships and can compromise mechanical stiffness and resonant frequency. By contrast, anisotropic etching makes lateral growth less “uncontrolled,” improving repeatability of feature profiles and mechanical design targets.2
3) Enables high-performance 3D microstructures without complex multi-step scaffolds
Anisotropic etching is attractive because it can generate 3D geometries directly from planar masks. For instance, in crystalline silicon, appropriate mask alignment with crystal axes can produce characteristic sidewalls and cavity shapes without requiring multiple deposition/etch steps to “sculpt” the final profile.2
4) Compatibility with MEMS process flows and mechanical reliability
MEMS often involve thin membranes and released structures where mechanical reliability matters. Minimizing unwanted lateral etch and controlling sidewall angle can reduce stress concentrations and improve device yield. Additionally, because anisotropic wet etching can act as a controlled “self-limiting” process against certain planes, it can simplify process calibration compared with purely isotropic wet processes.
Footnotes
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"Anisotropic etching" (Wikipedia) - https://en.wikipedia.org/wiki/Anisotropic_etching - Explains anisotropic etching and crystal/orientation dependence. ↩ ↩2 ↩3 ↩4
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"Deep reactive-ion etching" (Wikipedia) - https://en.wikipedia.org/wiki/Deep_reactive-ion_etching - Describes DRIE and high-aspect-ratio etching approaches (including Bosch mode). ↩ ↩2
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"Wet etching" (Wikipedia) - https://en.wikipedia.org/wiki/Wet_etching - Overview of wet etching concepts and general behavior. ↩
Wet etching profile control mechanisms
Wet etching profile outcomes are strongly influenced by:
- Transport: diffusion and convection determine how reactants reach the etch front.
- Chemical kinetics: reaction rates at different surfaces (and crystallographic planes) drive anisotropy.
- Byproducts/residue: can slow etching or change local chemistry.
Key terms:
- keyword mass transport
- keyword surface kinetics
- keyword etch selectivity
Dry etching profile control mechanisms
Dry etching profile outcomes are shaped by:
- Ion directionality: ion momentum normal to the wafer encourages vertical etch rates.
- Chemical component of etching: radicals enable surface reactions.
- Mask/sidewall passivation: some recipes deposit protective films on sidewalls, controlling lateral etch.
- Etch mode: DRIE can use alternating steps to achieve high aspect ratios.
Key terms:
- keyword ion-assisted etching
- keyword sidewall passivation
- keyword Bosch-mode DRIE
How anisotropic etching fits into a typical MEMS flow
Select substrate orientation/material
1. Wafer prepFor anisotropic wet etching, the crystal orientation (e.g., silicon wafer cut) is critical."
Define mask openings
2. Pattern definitionMask geometry and alignment relative to crystal axes determine final cavity/sidewall shape."
Use anisotropic wet or directional dry etch
3. Etch stepAnisotropic behavior yields controlled sidewall angles and reduced undercut."
Clean, release, and finish
4. Post-etch processingMitigate residues/damage, and address drying/stiction risks for released MEMS."
Qualitative trade-offs: wet vs dry etching for MEMS
Higher is generally better for that axis (qualitative, process-dependent).
FAQ: Edge cases and subtleties
Anisotropic vs isotropic etching (quick self-check)
Knowledge Check
Which statement best characterizes wet etching in many MEMS applications?