Coursify

Floating Point Data Type in Computer Organisation and Architecture

Floating Point Data Type in Computer Organisation and Architecture

Verified Sources
Jul 13, 2026

Floating point representation is the cornerstone of how computers store and manipulate real numbers — values that may include fractional parts and span enormous magnitudes. Unlike fixed-point representation which keeps the decimal point at a constant location, floating point allows the point to "float," enabling a vast dynamic range. This mirrors scientific notation in decimal (e.g., 6.022×10236.022 \times 10^{23}), but in binary.

The IEEE 754 standard, established in 1985 and revised in 2008, is the universally adopted specification for floating point arithmetic. It was created to end the chaos of manufacturer-specific formats that plagued early computing, ensuring that the same computation yields the same result on any compliant machine . The standard was significantly influenced by Intel's work on the 8087 numeric coprocessor .

A floating point number is stored using three core fields:

  • Sign bit (S): 1 bit — 0 for positive, 1 for negative.
  • Biased exponent (E): Stored as an unsigned integer with a bias so that comparisons of exponents behave like unsigned integer comparisons.
  • Mantissa (M): Also called the significand. For normalized numbers the integer part is always 1, so it is implied (the "hidden bit" or "implicit leading 1") and only the fractional part is stored .
PrecisionTotal BitsSignExponentMantissaBiasExponent Range
Single (binary32)321823127−126-126 to +127+127
Double (binary64)64111521023−1022-1022 to +1023+1023
Half (binary16)16151015−14-14 to +15+15
Quadruple (binary128)12811511216383−16382-16382 to +16383+16383

The actual value of a normalized IEEE 754 number is computed as:

Value=(−1)S×1.M×2(E−Bias)\text{Value} = (-1)^S \times 1.M \times 2^{(E - \text{Bias})}

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩ ↩2

  2. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

Floating Point Numbers: IEEE 754 Standard | Single Precision and Double Precision Format

Converting a Decimal Number to IEEE 754 Single Precision

  1. 1
    Step 1

    Take the number +19.5+19.5. The integer part 1919 in binary is 1001110011. The fractional part 0.50.5 in binary is 0.10.1 (since 0.5×2=1.00.5 \times 2 = 1.0). So 19.510=10011.1219.5_{10} = 10011.1_2 .

    Footnotes

    1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

  2. 2
    Step 2

    Shift the radix point so there is exactly one non-zero digit to its left: 10011.12=1.00111×2410011.1_2 = 1.00111 \times 2^4. This is the normalized form, meaning the leading 11 becomes the implicit hidden bit .

    Footnotes

    1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

  3. 3
    Step 3

    The number is positive, so the sign bit S=0S = 0. For a negative number, S=1S = 1.

  4. 4
    Step 4

    The actual exponent is 44. For single precision, the bias is 127127. The stored (biased) exponent is E=4+127=131E = 4 + 127 = 131. In binary: 13110=100000112131_{10} = 10000011_2 .

    Footnotes

    1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

  5. 5
    Step 5

    From the normalized form 1.00111×241.00111 \times 2^4, drop the implicit leading 11 and keep the fractional bits: 0011100111. Pad to 23 bits: 0011100000000000000000000111000000000000000000 .

    Footnotes

    1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

  6. 6
    Step 6

    "Combine sign (1 bit), exponent (8 bits), and mantissa (23 bits):

    S | Exponent | Mantissa 0 | 10000011 | 00111000000000000000000

    Full 32-bit pattern: 0 10000011 00111000000000000000000 ."

    Footnotes

    1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

Special Values in IEEE 754

Not all bit patterns represent ordinary numbers. IEEE 754 reserves certain exponent/mantissa combinations to encode special values that make floating point arithmetic algebraically complete — every operation produces a well-defined result without crashing .

Exponent FieldMantissa FieldMeaning
All 0s (000...0)All 0s±0\pm 0 (signed zero)
All 0s (000...0)Non-zeroDenormalized (subnormal) numbers
All 1s (111...1)All 0s±∞\pm\infty (infinity)
All 1s (111...1)Non-zeroNaN (Not a Number)

Examples of operations producing special values :

OperationResult
n÷±∞n \div \pm\infty00
±nonZero÷±0\pm\text{nonZero} \div \pm0±∞\pm\infty
±0÷±0\pm0 \div \pm0NaN
±∞÷±∞\pm\infty \div \pm\inftyNaN
±∞×0\pm\infty \times 0NaN
−1\sqrt{-1}NaN

A key property: NaN == NaN evaluates to False in IEEE 754, which is critical for detecting NaN in comparisons .

Denormalized (Subnormal) Numbers

When the exponent field is all zeros and the mantissa is non-zero, the number is denormalized. Unlike normalized numbers, there is no implicit leading 11 — the value is:

Value=(−1)S×0.M×2(1−Bias)\text{Value} = (-1)^S \times 0.M \times 2^{(1 - \text{Bias})}

Denormalized numbers fill the gap between zero and the smallest normalized number, providing a graceful path to zero rather than a sudden jump — a property called gradual underflow .

Footnotes

  1. IEEE 754 — Wikipedia — The IEEE 754 standard specification including formats, rounding rules, and exception handling. ↩ ↩2

  2. Explain the IEEE Standard 754 Floating-Point Numbers — Tutorialspoint — Tutorial on IEEE 754 representations, special values, and bias explanation. ↩ ↩2

Rounding Modes in IEEE 754

Since infinitely many real numbers exist but only finitely many can be represented, the standard defines rounding rules. The default mode is round to nearest, ties to even .

Rounding ModeDescription
Round to Nearest, Ties to EvenDefault; round to nearest representable value, break ties toward even mantissa
Round toward +∞+\infty (Ceiling)Always round up
Round toward −∞-\infty (Floor)Always round down
Round toward Zero (Truncation)Discard digits beyond precision

IEEE 754 also defines five exception flags that are set (but do not halt execution) when exceptional conditions occur :

  1. Invalid operation — e.g., 0/00/0, −1\sqrt{-1}
  2. Overflow — result too large to represent
  3. Underflow — result too small (falls below normalized range)
  4. Inexact — result required rounding (loss of precision)
  5. Division by zero — finite operand divided by zero

Footnotes

  1. IEEE 754 — Wikipedia — The IEEE 754 standard specification including formats, rounding rules, and exception handling. ↩ ↩2

Bit Allocation Across IEEE 754 Floating Point Formats

Comparison of how many bits are allocated to each field across different precision formats

Approximate Numeric Range of IEEE 754 Formats

Logarithmic comparison of the largest representable value (decimal exponent) per format

History and Evolution of Floating Point Standards

Era of Incompatible Formats

1970s

Different manufacturers (IBM, Cray, DEC) used proprietary floating point formats with varying word sizes, representations, and rounding behavior. Code portability was nearly impossible ."

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩

Intel 8087 Development

1976–1980

Intel began designing the i8087 numeric coprocessor. The work heavily influenced the proposal that became IEEE 754, championed by William Kahan ."

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩

IEEE 754 Standard Published

1985

The IEEE Standard for Binary Floating-Point Arithmetic (IEEE 754-1985) was formally adopted, defining single and double precision formats, special values, and rounding rules ."

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩

IEEE 754 Revision

2008

The standard was revised as IEEE 754-2008, adding decimal floating point formats (decimal64, decimal128) and clarifying operations and exception handling ."

Footnotes

  1. IEEE 754 — Wikipedia — The IEEE 754 standard specification including formats, rounding rules, and exception handling. ↩

Modern Usage

2019

IEEE 754 is followed by virtually all modern CPUs and GPUs. New formats like bfloat16 and TensorFloat-32 have emerged for AI workloads, but remain compatible with IEEE principles."

1import struct 2 3# Convert float to IEEE 754 single precision binary 4num = 19.5 5packed = struct.pack('!f', num) 6bits = ''.join(f'{b:08b}' for b in packed) 7print(f"Decimal: {num}") 8print(f"IEEE 754 (32-bit): {bits}") 9print(f"Sign: {bits[0]}") 10print(f"Exponent: {bits[1:9]}") 11print(f"Mantissa: {bits[9:]}") 12 13# Show special values 14import math 15print(f"\nInfinity: {struct.unpack('!f', struct.pack('!I', 0x7F800000))[0]}") 16print(f"NaN check: {math.isnan(struct.unpack('!f', struct.pack('!I', 0x7FC00000))[0])}") 17 18# Demonstrate rounding imprecision 19print(f"\n0.1 + 0.2 = {0.1 + 0.2}") # 0.30000000000000004 20print(f"0.3 == 0.1 + 0.2: {0.3 == 0.1 + 0.2}") # False

Floating Point Addition: Aligning, Adding, and Normalizing

  1. 1
    Step 1

    To add two floating point numbers, their exponents must be equal. Compare the exponents of both operands. The number with the smaller exponent must be adjusted to match the larger one .

    Footnotes

    1. Lecture Notes — Floating Point Arithmetic, UW-Madison — Academic lecture notes on FP arithmetic algorithms, alignment, normalization, and overflow/underflow handling. ↩

  2. 2
    Step 2

    Shift the mantissa of the number with the smaller exponent to the right by the difference in exponents, incrementing the smaller exponent with each shift. Example: To add 0.537×102+0.158×10−10.537 \times 10^2 + 0.158 \times 10^{-1}, shift the second number's mantissa right by 3 positions: 0.000158×1020.000158 \times 10^2 .

    Footnotes

    1. Lecture Notes — Floating Point Arithmetic, UW-Madison — Academic lecture notes on FP arithmetic algorithms, alignment, normalization, and overflow/underflow handling. ↩

  3. 3
    Step 3

    With exponents now equal, add (or subtract) the mantissas directly. The result carries the common exponent. Hardware operates similarly to sign/magnitude integer arithmetic .

    Footnotes

    1. Lecture Notes — Floating Point Arithmetic, UW-Madison — Academic lecture notes on FP arithmetic algorithms, alignment, normalization, and overflow/underflow handling. ↩

  4. 4
    Step 4

    If the sum overflows (carries beyond the radix point), shift right and increment the exponent. If the sum has leading zeros (underflow), shift left and decrement the exponent. Continue until the mantissa is in normalized form 1.xxxx1.xxxx .

    Footnotes

    1. Lecture Notes — Floating Point Arithmetic, UW-Madison — Academic lecture notes on FP arithmetic algorithms, alignment, normalization, and overflow/underflow handling. ↩

  5. 5
    Step 5

    Apply the selected rounding mode (default: round to nearest, ties to even). Guard bits are used during computation to preserve accuracy that would otherwise be lost during alignment shifting .

    Footnotes

    1. Lecture Notes — Floating Point Arithmetic, UW-Madison — Academic lecture notes on FP arithmetic algorithms, alignment, normalization, and overflow/underflow handling. ↩

  6. 6
    Step 6

    Verify that the final exponent is within the representable range. If the exponent exceeds the maximum, set the result to ±∞\pm\infty (overflow). If it falls below the minimum, produce a denormalized number or zero (underflow) .

    Footnotes

    1. IEEE 754 — Wikipedia — The IEEE 754 standard specification including formats, rounding rules, and exception handling. ↩

The Hidden Bit Saves One Bit of Storage

In IEEE 754 normalized numbers, the leading 1 before the binary point is always present, so it is not stored. This effectively gives single precision 24 bits of significand precision (23 stored + 1 implicit) and double precision 53 bits (52 stored + 1 implicit) — for free .

Footnotes

  1. IEEE Standard 754 Floating Point Numbers — GeeksforGeeks — Detailed breakdown of single/double precision formats with bit allocations and special values. ↩

Floating Point Imprecision: 0.1 + 0.2 ≠ 0.3

Because 0.10.1 and 0.20.2 cannot be represented exactly in binary, the sum 0.1+0.20.1 + 0.2 yields 0.300000000000000040.30000000000000004 in double precision. This is not a bug — it is an inherent limitation of finite binary representation. Always use a tolerance-based comparison (e.g., ∣a−b∣<ϵ|a - b| < \epsilon) when comparing floating point values .

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩

FLOPS: Measuring Floating Point Performance

The speed of floating point operations is measured in FLOPS (Floating Point Operations Per Second). This metric is particularly important for scientific computing, simulations, and AI workloads. Modern GPUs can achieve tens of TFLOPS (trillions of operations per second) in single precision .

Footnotes

  1. Floating-point arithmetic — Wikipedia — Comprehensive overview of floating point history, standards, and precision issues. ↩

Edge Cases and Advanced Topics

Floating Point Key Concepts

1 / 6
Question · Term

What three fields make up an IEEE 754 floating point number?

Click to reveal
Answer · Definition

Sign bit (S), Biased Exponent (E), and Mantissa/Fraction (M). The value is (−1)S×1.M×2(E−Bias)(-1)^S \times 1.M \times 2^{(E - \text{Bias})} for normalized numbers.

Summary: Floating Point Representation Trade-offs

The floating point data type represents a fundamental trade-off between range and precision. With a fixed number of bits, you can either represent a very wide range of magnitudes (as floating point does) or represent a narrower range with exact precision (as fixed point does). IEEE 754 resolves this by:

  1. Normalizing numbers to maximize significant digits
  2. Using a biased exponent for efficient hardware comparison
  3. Reserving special bit patterns for zero, infinity, NaN, and denormals
  4. Defining rounding modes and exception flags for predictable behavior

The key formula to remember:

Value=(−1)S×1.M×2(E−Bias)\text{Value} = (-1)^S \times 1.M \times 2^{(E - \text{Bias})}

Understanding floating point representation is essential for computer architects designing arithmetic units, compilers generating floating point code, and programmers writing numerically sensitive software. The IEEE 754 standard ensures that a computation performed on any compliant machine — from a microcontroller to a supercomputer — yields the same result .

Footnotes

  1. IEEE 754 — Wikipedia — The IEEE 754 standard specification including formats, rounding rules, and exception handling. ↩

Knowledge Check

Question 1 of 5
Q1Single choice

How many bits are allocated to the mantissa in IEEE 754 single precision format?

Explore Related Topics

1

Virtual Memory, Its Implementation, and the Role of the TLB

Virtual memory abstracts physical RAM by giving each process a large contiguous logical address space, implemented with paging, page tables, and a Translation Lookaside Buffer (TLB) that caches recent translations.

  • Provides protection, simplifies programming, enables demand paging and sharing of code/pages.
  • Virtual address = (VPN, offset); physical address = (PFN, offset) with VPN → PFN via TLB or page‑table walk.
  • Effective access time: EAT=α(m+ϵ)+(1−α)(2m+ϵ)EAT = \alpha (m+\epsilon) + (1-\alpha)(2m+\epsilon), so high TLB hit rate α\alpha is critical.
  • Multi‑level page tables reduce memory use for sparse address spaces.
  • TLB reach = (entries) × (page size); exceeding it causes TLB thrashing and performance loss.
2

Fundamentals of Operating System Architecture and Resource Management

The course explains the essential structures and mechanisms of operating systems, covering kernel designs, process control, memory management, and CPU scheduling.

  • Kernels are either monolithic (all services in one privileged space) or microkernel (minimal core with services in user space).
  • Processes follow a five‑state lifecycle (new, ready, running, waiting, terminated) and a context switch saves the current PCB, runs the scheduler, and restores the next process.
  • Virtual memory uses paging, an MMU, and page tables; a missing page triggers a page fault to load data from secondary storage.
  • Scheduling algorithms such as Round Robin (time‑quantum preemptive) and Shortest Job First (optimizes average wait time but can starve long jobs) manage CPU allocation.
  • Exceeding physical memory causes thrashing, where excessive paging degrades system responsiveness.
3

The Stack Pointer Points to the Top of Stack

The stack pointer (SP) is a CPU register that always identifies the current top of the stack—either the last used address or the next free slot—separate from the program counter, data registers, or I/O pointers.

  • SP tracks the active end of the stack, enabling push/pop, function calls, returns, and interrupt handling.
  • Architectures differ: some define SP as the address of the last stored item, others as the next free location, but both denote the stack’s top.
  • When the stack grows downward, a push is SP←SP−kSP \leftarrow SP - k followed by storing the value at SPSP, and a pop reads value←M[SP]value \leftarrow M[SP] then SP←SP+kSP \leftarrow SP + k.
  • The correct exam answer is (ii) Top of stack; it does not point to program memory, general data memory, or I/O ports.
Browse all research articles