Designing a Four-Input Logic Circuit with an Equality Condition

This section designs a combinational logic circuit with inputs $A$, $B$, $C$, and $D$, and output $Y$.

The specification is:

• $Y=1$ only when $A$ and $B$ are both high.
• At the same time, $C$ and $D$ must be equal: either both low or both high.

The condition on $C$ and $D$ is an XNOR gate condition. An XNOR gate produces $1$ for input pairs $00$ and $11$; its Boolean expression is $CD+\overline{C}\,\overline{D}$.

Therefore, the required circuit is:

$$Y=AB(CD+\overline{C}\,\overline{D})$$

Equivalently:

$$Y=AB(C\odot D)$$

where $\odot$ denotes XNOR.

The design can be understood as an AND gate combining two conditions:

1. $A$ and $B$ are both $1$.
2. $C$ and $D$ are equal.

Footnotes

1. XNOR gate - Wikipedia - Defines XNOR as logical equivalence and gives its truth table and Boolean forms. ↩

1. Translating the specification into Boolean logic

The phrase “$A$ and $B$ are both 1” translates directly to an AND operation:

$$AB$$

The phrase “$C$ and $D$ are both low or both high” describes equality between $C$ and $D$:

$$(C=0,D=0)\ \text{or}\ (C=1,D=1)$$

Using Boolean algebra, these two cases become:

• Both low: $\overline{C}\,\overline{D}$
• Both high: $CD$

Combining the alternatives with OR gives:

$$C\odot D=CD+\overline{C}\,\overline{D}$$

Finally, both major conditions must hold, so they are connected with AND:

$$Y=AB(CD+\overline{C}\,\overline{D})$$

The expanded sum-of-products form is:

$$Y=ABCD+AB\overline{C}\,\overline{D}$$

This expression contains two valid cases:

• $A=B=C=D=1$
• $A=B=1$ and $C=D=0$

2. Truth-table derivation

A truth table contains $2^4=16$ possible input combinations for four inputs.

The output is $1$ only when:

$$A=1,\quad B=1,\quad C=D$$

The intermediate signal $E=C\odot D$ is useful:

$$E= \begin{cases} 1,&C=D\\ 0,&C\ne D \end{cases}$$

Thus, using standard minterm notation with $A$ as the most significant variable:

$$Y(A,B,C,D)=\sum m(12,15)$$

The two minterms are:

$$m_{12}=AB\overline{C}\,\overline{D}$$ $$m_{15}=ABCD$$

Therefore:

$$Y=AB\overline{C}\,\overline{D}+ABCD$$

Factoring $AB$ gives:

$$Y=AB(\overline{C}\,\overline{D}+CD)$$

3. Circuit implementation using an XNOR gate

The most direct implementation uses:

• One 2-input AND gate for $AB$.
• One 2-input XNOR gate for $C\odot D$.
• One final 2-input AND gate.

Define intermediate signals:

$$X=AB$$ $$Z=C\odot D$$

Then:

$$Y=XZ$$

or:

$$Y=(AB)(C\odot D)$$

Gate-level structure

This is the preferred design because it maps directly to the verbal specification and uses the XNOR gate for the equality condition.

4. Implementation using only AND, OR, and NOT gates

If an XNOR gate is unavailable, construct it from basic gates.

The XNOR expression is:

$$C\odot D=CD+\overline{C}\,\overline{D}$$

Required gates:

1. NOT gate to produce $\overline{C}$.
2. NOT gate to produce $\overline{D}$.
3. AND gate to produce $CD$.
4. AND gate to produce $\overline{C}\,\overline{D}$.
5. OR gate to combine the two terms.
6. AND gate to combine the result with $AB$.

The complete expression is:

$$Y=AB(CD+\overline{C}\,\overline{D})$$

A fully expanded implementation is:

$$Y=(AB)\left[(CD)+(\overline{C}\,\overline{D})\right]$$

5. Karnaugh-map verification

A Karnaugh map for four variables contains $16$ cells.

The output is $1$ at minterms $m_{12}$ and $m_{15}$:

$$Y=\sum m(12,15)$$

Using rows $AB$ and columns $CD$ in Gray-code order:

The two $1$ cells are not adjacent in the K-map because the $CD$ combinations $00$ and $11$ differ in both variables. Therefore, no larger grouping can combine them into a single product term.

The resulting minimal sum-of-products expression is:

$$Y=AB\overline{C}\,\overline{D}+ABCD$$

Factoring the common term $AB$:

$$Y=AB(\overline{C}\,\overline{D}+CD)$$

The parenthetical expression is exactly the XNOR function:

$$\overline{C}\,\overline{D}+CD=C\odot D$$

Therefore:

$$\boxed{Y=AB(C\odot D)}$$

Footnotes

1. Introduction of K-Map - Describes four-variable Karnaugh maps and their 16-cell structure. ↩

6. Verification by test cases

The circuit satisfies the specification for every possible input combination.