Daisy-Chain Priority Interrupts: Detailed Mechanism, Timing, and Design Trade-offs

Daisy-Chain Priority Interrupts: Detailed Mechanism, Timing, and Design Trade-offs

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Nov 4, 2026

A daisy-chain priority interrupt is an interrupt arbitration method where several devices are connected in series (“daisy chained”). When interrupts occur, the interrupt-request propagation and the interrupt-acknowledge (or equivalent servicing) flow through the chain so that only the highest-priority pending device (as defined by physical/connection order) is allowed to respond.

This contrasts with schemes that use centralized prioritization tables or fixed hardware vectors per device. Daisy-chaining is often discussed in contexts such as cascaded interrupt controllers (e.g., older designs where controllers are linked to expand interrupt capacity), and also in direct daisy-chaining between devices where the acknowledge mechanism is passed along.

A key idea is that daisy-chain priority is not “dynamic” priority by software alone; it is typically defined by the chain position (or controller cascade relationship) and may be configurable only in limited ways, depending on the specific controller/device.

A typical chain consists of signals analogous to:

  • IRQ line: request asserted by a device
  • INTA/acknowledge: an acknowledge pulse/handshake to let the requesting device provide the service response
  • cascade input/output: internal chain endpoints that connect devices/controllers in order

Important: Exact signal names and cycle-level behavior vary by architecture and controller family, but the arbitration principle (first pending in chain wins, others suppress response) is consistent.

Interrupt Daisy Chaining / Interrupt Priority (Concept Overview)

Key terms you’ll use throughout

  • interrupt controller: often implements daisy-chain/cascade logic
  • pending interrupt: may wait until it becomes highest in chain
  • acknowledge handshake: prevents multiple devices from responding simultaneously
  • masking: affects which device can actually be serviced

How daisy-chain priority interrupt arbitration works (conceptual handshake)

  1. 1
    Step 1

    Each device asserts its IRQ line when it needs service. If multiple devices request simultaneously, more than one may be pending.

  2. 2
    Step 2

    The chain logic ensures that when the CPU is ready to service interrupts, the chain identifies the first eligible pending requester in chain order (highest priority first).

  3. 3
    Step 3

    CPU or system interrupt logic triggers an interrupt acknowledge pulse (or equivalent).

  4. 4
    Step 4

    The first pending device in chain receives the acknowledge in time and outputs the response (e.g., vector, status, or instruction-ready condition).

  5. 5
    Step 5

    Once acknowledge has been accepted by the winning device/controller stage, remaining stages do not generate the same response. They effectively wait for the next acknowledge cycle.

  6. 6
    Step 6

    After the CPU services the winning device, the chain returns to arbitration for any still-pending requests. If another device remains pending, it can win on the next acknowledge.

Visualizing the arbitration outcome

Assume a chain order: D1D_1 (highest) → D2D_2 → D3D_3 (lowest). If D2D_2 and D3D_3 are requesting at the same time, the chain logic ensures D2D_2 wins because it appears earlier in the chain.

What “priority” means in a daisy-chain

In daisy-chain priority, “priority” is typically encoded by physical/circuit ordering:

  • Devices/interrupt-controller stages earlier in the chain have higher priority
  • Later stages are lower priority
  • If multiple interrupts are pending, only the earliest pending stage is acknowledged/serviced first

This is effectively a hardware implementation of:

“Select the first pending requester encountered when scanning from head of chain to tail.”

type="tip" title="Pro Tip: Trace by chain head" content="When debugging, focus on the chain head (highest-priority endpoint). If you never see lower-priority servicing, check whether the higher-priority stage is staying pending (e.g., not cleared/EOI) or masked."

type="warning" title="Warning: Acknowledge timing matters" content="In many designs, daisy-chain arbitration relies on precise acknowledge timing. If devices/controllers fail to latch the acknowledge correctly or if EOI/clear timing is wrong, you may observe lost interrupts or repeated servicing."

Interrupt servicing lifecycle in a daisy-chain system

IRQ raised

1. Request asserted

A device sets its interrupt request; it may be level- or edge-triggered depending on hardware."

CPU/system ready

2. Arbitration opportunity

Interrupt logic waits until CPU can accept an interrupt (global enable, masking, priority rules)."

INTA/service pulse

3. Acknowledge

The chain forwards an acknowledge so only the highest-priority pending stage responds."

CPU handles ISR

4. Service

ISR runs; device/controller provides the interrupt source information."

Clear/EOI and return to arbitration

5. Completion

After EOI (or equivalent clear), the next pending request can win."

EOI/clearing: why it’s essential

Most interrupt controllers (and many devices in daisy-chain arrangements) require an explicit completion mechanism:

  • EOI signals completion
  • Without correct clearing, the controller/device may remain in a pending interrupt state
  • That can block lower-priority stages indefinitely because the chain continues to see an earlier pending requester

Cascaded controllers vs direct daisy-chaining between devices

You’ll often see daisy-chain priority described in at least two common patterns:

  1. Direct device daisy-chaining
    Devices are linked so that acknowledge propagates through them. Priority becomes “first device in chain that is requesting.”

  2. Cascaded interrupt controllers
    Multiple interrupt controllers can be linked in a cascade. The “cascade” controller behaves like a stage in a larger chain:

  • requests from downstream controllers compete with upstream controller requests
  • EOI and acknowledge semantics may be mediated through cascade endpoints

A cascaded controller still implements a chain-order priority selection; it’s just the arbitration logic packaged inside controller chips rather than distributed solely across devices.

Priority selection intuition in a 3-stage daisy chain

Higher bar means earlier chain position; only the first pending stage is serviced on an acknowledge.

Common edge cases

Practical design implications

  • Pros
    • Simple hardware conceptually: chain + acknowledge propagation
    • Clear deterministic priority: defined by chain topology
  • Cons
    • Scalability/latency: long chains can increase worst-case interrupt acknowledge propagation
    • Rigid priority: reordering chain changes priority (unless controller provides programmable priority)
    • Debug complexity: a stuck pending/EOI bug in a higher stage can starve lower stages

Daisy-Chain Priority Interrupt Quick Check

1 / 4
Question · Term

In a daisy-chain priority system, how is priority determined?

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Answer · Definition

By chain order: the earliest eligible pending requester encountered from the chain head wins.

Knowledge Check

Question 1 of 3
Q1Single choice

In a daisy-chain priority interrupt scheme, what typically determines which interrupt is serviced first when multiple requests are pending?