Cyclic Redundancy Check (CRC)
CRC is a highly efficient and widely used error detection mechanism in networks (like Ethernet). It treats binary data as a polynomial, divides it by a predefined divisor polynomial using Modulo-2 arithmetic, and appends the remainder to the frame. A non-zero remainder at the receiver signals a corrupted frame.
Learning Goals
- Introduction to Cyclic Codes.
- CRC Mechanism: Generator polynomial, hardware implementation, and polynomial division.
- CRC Encoder (Modulo-2 binary division at the transmitter) and CRC Decoder (checking the remainder at the receiver).
- Perform binary Modulo-2 division to calculate the CRC checksum for a given dataword and generator polynomial.
- Analyze how the choice of the generator polynomial affects the error detection capability of CRC.
Cyclic Redundancy Check (CRC) is a fundamental error-detection code used in the Data Link Layer to detect accidental bit corruption in frames before they are accepted by the receiver.2 In network protocols such as Ethernet and HDLC, the sender computes a short Frame Check Sequence (FCS) from the outgoing frame and appends it to the transmitted bits.2 The receiver repeats the same computation or, equivalently, divides the received codeword by the same generator polynomial; a zero remainder indicates that no detectable error has occurred.2
CRC is called a cyclic code because bit strings are interpreted as polynomials over , where addition and subtraction are both implemented as XOR, with no carries or borrows.2 This algebraic structure makes CRC both mathematically analyzable and highly efficient in hardware, especially with shift registers and XOR gates.2 Compared with simple parity or additive checksums, CRC provides much stronger detection of common line errors, especially burst errors that affect adjacent bits in a frame.2
Within Network Theory, CRC should be understood as a practical instance of cyclic codes used for link-level integrity, not for cryptographic security. Its goals are to detect noise-induced corruption, framing faults, and many multi-bit error patterns at line speed.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩ ↩2 ↩3 ↩4 ↩5
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩ ↩2 ↩3
-
Data Link Layer PDF - Lists common CRC polynomials and notes properties such as odd-bit and burst-error detection. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩ ↩2 ↩3
-
Cyclic Redundancy Code (CRC) Polynomial Selection For Embedded Networks - Discusses polynomial selection, Hamming distance, hardware taps, and detection strength for given frame lengths. ↩ ↩2
-
What Is a Cyclic Redundancy Check? | Everpure - Summarizes practical CRC operation and notes efficiency in hardware implementations. ↩
CRC - Cyclic Redundancy Check
Where CRC Fits in the Network Stack
CRC is typically attached to the frame trailer at the Data Link Layer, especially in technologies such as Ethernet and HDLC, to detect transmission errors before higher layers process the payload.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Data Link Layer PDF - Lists common CRC polynomials and notes properties such as odd-bit and burst-error detection. ↩
Mathematical Model of CRC
A binary message can be represented as a polynomial whose coefficients are either or .2 For example, the bit string corresponds to
if the leftmost bit is the coefficient of the highest power. Likewise, a generator bit pattern such as corresponds to
The degree of is , so the CRC field has exactly bits.2 To form the transmitted codeword, the sender computes a remainder such that
is exactly divisible by over .2 Since arithmetic is modulo , subtraction is identical to addition:
which is why modulo-2 long division uses XOR rather than ordinary subtraction.2
A compact way to express CRC encoding is
and then
At the receiver, the test is simply
If the remainder is nonzero, an error is detected.2
Key technical ideas in this section include polynomial code, GF(2), remainder, and degree.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩ ↩2 ↩3
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩ ↩2 ↩3 ↩4
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩ ↩2 ↩3 ↩4
-
Cyclic Redundancy Code (CRC) Polynomial Selection For Embedded Networks - Discusses polynomial selection, Hamming distance, hardware taps, and detection strength for given frame lengths. ↩ ↩2
CRC Encoder at the Transmitter
- 1Step 1
Select an agreed binary divisor whose leftmost and rightmost bits are . If the generator has degree , the CRC field will contain bits.2
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
-
- 2Step 2
Take the original dataword and append zeros, which is equivalent to multiplying by in polynomial form.
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
- 3Step 3
Divide the padded dataword by the generator using XOR in place of subtraction. The quotient is discarded, and only the -bit remainder is kept.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
-
- 4Step 4
Replace the appended zeros with the computed remainder . The transmitted frame becomes , chosen so that it is divisible by .2
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
-
- 5Step 5
The resulting bits are placed into the frame trailer as the FCS before transmission over the link.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Data Link Layer PDF - Lists common CRC polynomials and notes properties such as odd-bit and burst-error detection. ↩
-
CRC Decoder at the Receiver
- 1Step 1
Read the incoming protected frame, including both payload and CRC bits.
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
- 2Step 2
Use the identical generator polynomial and perform modulo-2 division on the received bit sequence.2
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
-
- 3Step 3
If the remainder is all zeros, the frame passes the CRC check. If any bit in the remainder is , the frame is declared corrupted.2
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
-
- 4Step 4
Protocols usually accept frames that pass and discard or request retransmission for frames that fail, depending on the link protocol design.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Worked Example: Binary Modulo-2 Division
Consider the dataword and generator , which represents . Since the degree is , append zeros:
Now divide by using XOR-based long division. The remainder is . Therefore, the transmitted codeword is
because the sender replaces the appended zeros with the remainder.
To verify at the receiver, divide by again. The remainder is , so the frame is accepted as error-free under the CRC test.
A compact summary is shown below.
| Item | Value |
|---|---|
| Dataword | |
| Generator | |
| Polynomial form | |
| Degree | |
| Padded dataword | |
| CRC remainder | |
| Codeword |
This example illustrates modulo-2 division, codeword, syndrome, and FCS.2
Footnotes
-
Cyclic Redundancy Check and Modulo-2 Division - GeeksforGeeks - Provides a worked binary division example with dataword and generator . ↩ ↩2 ↩3 ↩4 ↩5
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
- Align with the leftmost of the current dividend.
- XOR where the leading bit is ; otherwise shift right.
- Bring down the next bit and continue until all bits are processed.
- Keep only the final bits as the CRC remainder.
Footnotes
-
Cyclic Redundancy Check and Modulo-2 Division - GeeksforGeeks - Provides a worked binary division example with dataword and generator . ↩ ↩2 ↩3
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
Hardware Implementation of CRC
CRC is especially attractive because the same polynomial logic maps naturally onto linear feedback shift register (LFSR) hardware.2 In a typical implementation, incoming bits are shifted through a register, and XOR feedback taps correspond to the nonzero coefficients of the generator polynomial. Each clock cycle updates the register state, so the final register contents after the last data bit represent the CRC remainder.2
This makes CRC computation suitable for line-rate implementation in network interface hardware and storage controllers.2 Historically, many practical polynomials were chosen partly because they required relatively few feedback taps, making early hardware simpler. Modern systems may also provide instruction-level acceleration for some standardized CRCs.
In conceptual terms, the encoder and checker are almost identical circuits: one computes the remainder before transmission, while the other verifies that the received codeword produces the expected zero remainder or known residue, depending on the implementation convention.2
Footnotes
-
Cyclic Redundancy Code (CRC) Polynomial Selection For Embedded Networks - Discusses polynomial selection, Hamming distance, hardware taps, and detection strength for given frame lengths. ↩ ↩2 ↩3 ↩4 ↩5 ↩6
-
What Is a Cyclic Redundancy Check? | Everpure - Summarizes practical CRC operation and notes efficiency in hardware implementations. ↩ ↩2 ↩3 ↩4
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
Fast Mental Rule
In manual CRC division, never use ordinary subtraction. Every subtraction step is XOR, so and .2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Cyclic Redundancy Check and Modulo-2 Division - GeeksforGeeks - Provides a worked binary division example with dataword and generator . ↩
Error Detection Capability and the Role of the Generator Polynomial
The quality of CRC depends heavily on the choice of generator polynomial.2 All CRC polynomials detect all single-bit errors, but stronger guarantees for double-bit, odd-bit, and burst errors depend on algebraic properties of .2
Several widely cited design rules are important in link-layer CRC selection:3
- If has at least two nonzero terms, all single-bit errors are detected.
- If does not divide for relevant frame lengths, many double-bit errors are also detected.2
- If is a factor of , then all error patterns with an odd number of flipped bits are detected.
- If the generator has degree , then all burst errors of length are detected, and for longer bursts the undetected fraction is approximately , so the detected fraction is approximately .2
This burst-error property is especially important in the Data Link Layer because real channels often exhibit correlated disturbances rather than isolated random bit flips. For example, a 32-bit CRC can detect every burst error up to length bits, which is why CRC-32 is widely used in LAN technologies such as Ethernet.2
The choice of polynomial also affects Hamming distance over a given maximum frame length, which in turn determines guaranteed detection of certain multi-bit error patterns. Research by Koopman and others has shown that some newer polynomials outperform older legacy choices for specific packet sizes, meaning the “best” generator depends on both degree and protected message length.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩ ↩2 ↩3 ↩4
-
Cyclic Redundancy Code (CRC) Polynomial Selection For Embedded Networks - Discusses polynomial selection, Hamming distance, hardware taps, and detection strength for given frame lengths. ↩ ↩2 ↩3 ↩4 ↩5 ↩6
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩ ↩2 ↩3 ↩4
-
Data Link Layer PDF - Lists common CRC polynomials and notes properties such as odd-bit and burst-error detection. ↩ ↩2 ↩3
-
Double Burst Error Detection Capability of Ethernet CRC - IEEE 802 - Notes the Ethernet CRC-32 polynomial and its guaranteed burst-detection capability up to bits. ↩
-
What Is a Cyclic Redundancy Check? | Everpure - Summarizes practical CRC operation and notes efficiency in hardware implementations. ↩
Typical Guaranteed Burst-Error Detection by CRC Degree
A degree- CRC detects all burst errors of length up to bits.2
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
Generator Polynomial Insights
CRC Processing Lifecycle in a Frame Transmission
Frame Preparation
Step 1The sender forms the data link frame payload and selects the agreed generator polynomial."
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
CRC Encoding
Step 2The sender appends zeros, performs modulo-2 division, and inserts the -bit remainder as the FCS.2"
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
Transmission
Step 3The codeword traverses the medium, where noise or interference may flip bits."
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
Receiver Checking
Step 4The receiver divides the full received bitstream by the same generator polynomial.2"
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
-
Lecture 3: Framing and Error Detection - Presents CRC goals, modulo-2 division, and the burst-error guarantee for degree- generators. ↩
Decision
Step 5A zero remainder leads to acceptance; a nonzero remainder triggers rejection or retransmission logic."
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩
Standard CRC Polynomials in Networking Context
Several generator polynomials appear frequently in communication systems.2 Examples include CRC-16, CRC-CCITT, and CRC-32. Their names typically refer to the degree of the polynomial, which equals the number of CRC bits appended to the frame.
| Name | Polynomial | Common context |
|---|---|---|
| CRC-16 | HDLC and related link contexts | |
| CRC-CCITT | Telecom and WAN contexts2 | |
| CRC-32 | Ethernet/LANs2 |
The practical lesson is that a larger CRC degree generally improves random error detection probability, but the exact protection depends on polynomial structure and frame length, not only on the number of bits in the checksum.2
Footnotes
-
Data Link Layer PDF - Lists common CRC polynomials and notes properties such as odd-bit and burst-error detection. ↩ ↩2 ↩3 ↩4 ↩5
-
Untitled Document - Gives standard networking CRC polynomials such as CRC-16, CRC-CCITT, and CRC-32. ↩ ↩2
-
Double Burst Error Detection Capability of Ethernet CRC - IEEE 802 - Notes the Ethernet CRC-32 polynomial and its guaranteed burst-detection capability up to bits. ↩
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
-
Cyclic Redundancy Code (CRC) Polynomial Selection For Embedded Networks - Discusses polynomial selection, Hamming distance, hardware taps, and detection strength for given frame lengths. ↩
CRC Is Not Encryption
CRC detects accidental corruption but does not protect against intentional tampering. Because it is linear and predictable, it should never be confused with a cryptographic integrity mechanism.
Footnotes
-
Cyclic redundancy check - Wikipedia - Overview of CRC theory, arithmetic, burst-error detection, and generator selection. ↩
Exam-Oriented Problem-Solving Strategy
When asked to compute a CRC by hand in a Network Theory course, use a disciplined procedure.2
- Convert the generator bits into its polynomial form only if conceptual explanation is required.
- Let the generator length be ; then append zeros to the dataword.
- Perform XOR long division from left to right, only when the current leading bit is .
- The final bits are the CRC checksum.
- Append that checksum to the original dataword, not to the padded one.
- To verify, divide the full transmitted codeword by the same generator; the remainder should be all zeros.2
A common source of mistakes is using decimal subtraction, forgetting to append the correct number of zeros, or appending the remainder incorrectly.
Footnotes
-
Lesson 5 - The Data Link Layer - Explains CRC encoding and decoding in the Data Link Layer using polynomial division. ↩ ↩2 ↩3
-
Cyclic Redundancy Check and Modulo-2 Division - GeeksforGeeks - Provides a worked binary division example with dataword and generator . ↩ ↩2 ↩3 ↩4 ↩5
Knowledge Check
In CRC, what is the purpose of the generator polynomial ?