PYQ Analysis and Exam Preparation
1.5 hours
Learning Goals
- Solve previous year exam questions on microprocessor architecture fundamentals, 8-bit architecture, embedded systems, and the 8051 family
- Master commonly tested numerical problems and theoretical explanations
- Identify important topics and question patterns for the upcoming exam
PYQ Analysis — Module 1
Topic Distribution Analysis
From previous year question papers, Module 1 questions typically carry 8–12 marks in the exam. The distribution is:
| Topic | Marks (Avg) | Frequency |
|---|---|---|
| Microprocessor Architecture & Buses | 3–5 marks | Very High |
| Von Neumann vs Harvard Architecture | 2–4 marks | High |
| 8-bit vs 16-bit vs 32-bit Comparison | 2–4 marks | High |
| Embedded Systems Characteristics | 2–3 marks | Medium |
| 8051 Family Overview | 1–2 marks | Low |
High-Weightage Questions (Expected Tomorrow)
Q1: Draw and explain the internal architecture of a microprocessor. (5 marks)
Answer: A microprocessor consists of:
- CPU — The processing core that executes instructions
- ALU (Arithmetic Logic Unit) — Performs arithmetic (ADD, SUB, MUL, DIV) and logical (AND, OR, XOR, NOT) operations
- Control Unit — Decodes instructions and generates control signals for timing and sequencing
- Register Array — Temporary storage for data and addresses (accumulator, general-purpose registers, program counter, stack pointer, flags)
- Bus Interface — Connects internal components via:
- Address Bus (unidirectional, 16-bit for 8051 — can address 2^16 = 64 kB)
- Data Bus (bidirectional, 8-bit for 8051)
- Control Bus (carries control signals like RD, WR, ALE, PSEN)
Q2: Differentiate between Von Neumann and Harvard architecture. (4 marks)
| Feature | Von Neumann | Harvard |
|---|---|---|
| Memory | Single shared memory for code & data | Separate code & data memory |
| Buses | Single bus (time-multiplexed) | Separate buses for code & data |
| Speed | Slower (bus contention) | Faster (simultaneous access) |
| Used in | 8085 microprocessor | 8051 microcontroller |
| Complexity | Simpler hardware | More complex (dual buses) |
| Flexibility | More flexible (code can modify itself) | More secure (code cannot modify) |
Q3: Compare 8-bit, 16-bit, and 32-bit microcontrollers. (4 marks)
| Parameter | 8-bit (8051) | 16-bit (80196) | 32-bit (ARM Cortex) |
|---|---|---|---|
| Data width | 8 bits | 16 bits | 32 bits |
| Addressable memory | 64 kB | 1 MB | 4 GB |
| Register size | 8 bits | 16 bits | 32 bits |
| Max clock | ~40 MHz | ~50 MHz | >1 GHz |
| Power consumption | Low | Medium | High |
| Cost | Very low | Low | Moderate |
| Typical use | Simple embedded | Industrial control | Smartphones, complex systems |
Q4: Define embedded systems. List their characteristics. (3 marks)
Definition: An embedded system is a dedicated computer system designed to perform one or a few dedicated functions, often with real-time computing constraints.
Characteristics:
- Single-functioned — Designed for a specific task (unlike a general-purpose PC)
- Tightly constrained — Limited memory, processing power, and power consumption
- Real-time operation — Must respond to events within strict timing deadlines
- Reactive operation — Continuously reacts to changes in the external environment
- Low power — Often battery-powered
- Cost-sensitive — Optimized for low unit cost in mass production
Q5: List the key members of the 8051 family and their features. (2 marks)
| Device | Internal ROM | Internal RAM | Timers |
|---|---|---|---|
| 8051 | 4 KB | 128 bytes | 2 |
| 8031 | 0 KB (external only) | 128 bytes | 2 |
| 8951 | 4 KB (Flash) | 128 bytes | 2 |
| 8052 | 8 KB | 256 bytes | 3 |
Quick Revision Notes
- 8085 = Microprocessor (no internal RAM/ROM), 8051 = Microcontroller (has internal RAM/ROM)
- Key difference: Microprocessor = CPU only, Microcontroller = CPU + RAM + ROM + I/O on single chip
- MCS-51 = Official Intel name for the 8051 family
- Three buses: Address (unidirectional), Data (bidirectional), Control (signals)
- ALE = Address Latch Enable — used to demultiplex AD0-AD7
Knowledge Check
Question 1 of 5
Q1Single choice
Which architecture separates program memory from data memory?